Bulldog: a compiler for VLSI architectures
Bulldog: a compiler for VLSI architectures
Instruction-level parallel processing: history, overview, and perspective
The Journal of Supercomputing - Special issue on instruction-level parallelism
Processor Architecture: From Dataflow to Superscalar and Beyond
Processor Architecture: From Dataflow to Superscalar and Beyond
Very Long Instruction Word architectures and the ELI-512
ISCA '83 Proceedings of the 10th annual international symposium on Computer architecture
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Instruction-level parallelism (ILP) is a set of processor and compiler design techniques that speed up program execution via the parallel execution of individual RISC-style operations, such as memory loads and stores, integer additions, and floating-point multiplications. Although operations are executed in parallel, there is only a single thread of execution. The processor-compiler system is handed a single program, written for a sequential processor, from which it extracts the parallelism automatically.