Ianus: An Adaptive FPGA Computer
Computing in Science and Engineering
The potential of the cell processor for scientific computing
Proceedings of the 3rd conference on Computing frontiers
Scientific computing Kernels on the cell processor
International Journal of Parallel Programming
CASL: A rapid-prototyping language for modern micro-architectures
Computer Languages, Systems and Structures
Low-power leading-zero counting and anticipation logic for high-speed floating point units
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Computing discrete transforms on the Cell Broadband Engine
Parallel Computing
Error-Free Transformation in Rounding Mode toward Zero
Numerical Validation in Current Hardware Architectures
FFTC: fastest Fourier transform for the IBM cell broadband engine
HiPC'07 Proceedings of the 14th international conference on High performance computing
LaFA: lookahead finite automata for scalable regular expression detection
Proceedings of the 5th ACM/IEEE Symposium on Architectures for Networking and Communications Systems
Dynamic detection of uniform and affine vectors in GPGPU computations
Euro-Par'09 Proceedings of the 2009 international conference on Parallel processing
Sabrewing: A lightweight architecture for combined floating-point and integer arithmetic
ACM Transactions on Architecture and Code Optimization (TACO) - HIPEAC Papers
The potential of on-chip multiprocessing for QCD machines
HiPC'05 Proceedings of the 12th international conference on High Performance Computing
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Recent research has demonstrated the vulnerability of certain smart card architectures to power and electro-magnetic analysis when multiplier operations areinsufficiently shielded from external monitoring. Here several standard multipliers are investigated ...