Parallel processing for block ciphers on a fault tolerant networked processor array
International Journal of High Performance Systems Architecture
A mesh-structured scalable IPsec processor
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Performance evaluation of a wormhole-routed algorithm for irregular mesh NoC interconnect
ICDCN'10 Proceedings of the 11th international conference on Distributed computing and networking
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We propose a deterministic routing strategy called flee which introduces non-minimal paths in order to distribute traffic with a high degree of communication locality in Networks-on-Chips. In the recent design methodology, target system and its application of the Systems-on-a-Chip are designed in system level description language likeSystem-C, and simulated in the early stage of design. The task distribution is statically decided in this stage, and the amount of traffic between nodes can be analyzed. According to the analysis, a path that transfers a large amount of total data is firstly assigned with a relaxed limitation, thus it is mostly minimal. On the other hand, paths for small amount of total data, are secondly established so as not to disturb previously established paths, thus they are sometimes non-minimal. Simulation results show that the flee routing strategy improves up to 28.6% of throughput against the dimension-order routing on typical stream processing application programs.