Deadlock-Free Message Routing in Multiprocessor Interconnection Networks
IEEE Transactions on Computers
An Improved Algorithm for Fault-Tolerant Wormhole Routing in Meshes
IEEE Transactions on Computers
A generic architecture for on-chip packet-switched interconnections
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Route packets, not wires: on-chip inteconnection networks
Proceedings of the 38th annual Design Automation Conference
Interconnection Networks: An Engineering Approach
Interconnection Networks: An Engineering Approach
Fault-Tolerant Wormhole Routing Algorithms for Mesh Networks
IEEE Transactions on Computers
IEEE Transactions on Parallel and Distributed Systems
A Network on Chip Architecture and Design Methodology
ISVLSI '02 Proceedings of the IEEE Computer Society Annual Symposium on VLSI
Principles and Practices of Interconnection Networks
Principles and Practices of Interconnection Networks
A technique for low energy mapping and routing in network-on-chip architectures
ISLPED '05 Proceedings of the 2005 international symposium on Low power electronics and design
Non-Minimal Routing Strategy for Application-Specific Networks-on-Chips
ICPPW '05 Proceedings of the 2005 International Conference on Parallel Processing Workshops
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Irregular routing algorithms are based on fault-tolerant algorithms. They are capable of use with some modifications for irregular networks, and conventionally use several virtual channels (VCs) to pass faults and irregular nodes. A well-known wormhole-switched routing algorithm named f-cube3 employs three virtual channels to overtake faulty blocks. We have estimated an irregular routing algorithm derived from f-cube3 as a solution to increase the utilization of links with a higher saturation point which uses fewer numbers of VCs in comparison to f-cube3 by reducing desired virtual channels to two supporting irregular network. Moreover, simulation of both algorithms, for the same setting has been presented. Over and above, as the simulation results show, our algorithm has a higher performance in comparison with f-cube3 even with one less VC. As well, the results show that our algorithm has less blocked messages in the network with higher switched and routed messages in Network-on-Chip (NoC).