A 3.5 mW programmable high speed frequency divider for a 2.4 GHz CMOS frequency synthesizer

  • Authors:

  • Angel M. Gómez Argüello;João Navarro, S.Jr.;Wilhelmus Van Noije

  • Affiliations:

  • Universidade de São Paulo, Brasil;Universidade de São Paulo, Brasil;Universidade de São Paulo, Brasil

  • Venue:
  • SBCCI '05 Proceedings of the 18th annual symposium on Integrated circuits and system design
  • Year:
  • 2005

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Abstract

The implementation of a four bits programmable high speed frequency divider for a Frequency Synthesizer, using a 0.35 μm CMOS technology, is described. The programmable divider employs a divide-by-32/33 dual-modulus prescaler, two other counters, and the logic control necessary to operate the division. Additionally, a complete 2.4 GHz Synthesizer was designed to test the divider; it includes a VCO, a phase frequency detector with charge pump, a low pass filter, buffers to increase the signal levels, and the programmable divider itself. Experimental results show that the programmable divider reached an operation frequency of 2.6 GHz with power consumption of 3.5 mW at 3.3 V power supply. The dimensions of the prescaler and the programmable divider are 77 μm x 33 μm and 198 μm x 33 μm, respectively.