Ultra low power frequency divider for 2.45 GHz ZigBee frequency synthesizer

Authors:
Ali Sahafi;Jafar Sobhi;Mahdi Sahafi;Omid Farhanieh;Ziaddin Daie Koozehkanani
Affiliations:
Faculty of Electrical and Computer Engineering, University of Tabriz, Tabriz, Iran;Faculty of Electrical and Computer Engineering, University of Tabriz, Tabriz, Iran;Faculty of Electrical and Computer Engineering, University of Tabriz, Tabriz, Iran;Faculty of Electrical and Computer Engineering, University of Tabriz, Tabriz, Iran;Faculty of Electrical and Computer Engineering, University of Tabriz, Tabriz, Iran
Venue:
Analog Integrated Circuits and Signal Processing
Year:
2013

Citing 4
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Abstract

An ultra low power CMOS frequency divider whose modulus can be varied from 481 to 496 is presented. It has been customized to be used in 2.45 GHz Integer-N PLL frequency synthesizers utilized in ZigBee standard. Its based on swallow divider that replaces the swallow counter by a simple digital circuit in order to reduce power consumption and design complexity. Also a low power and high speed divide-by-7/8 is presented. Post layout simulation results exhibit 420 μW power consumption for 4 bit frequency divider in 2.45 GHz ISM frequency band that proves 40 % reduction compared to same previous works. All of the circuits have been designed in 0.18 μm TSMC CMOS technology with a single 1.8 V DC voltage supply.