How to Characterize the Problem of SEU in Processors and Representative Errors Observed on Flight

  • Authors:
  • R. Velazco;R. Ecoffet;F. Faure

  • Affiliations:
  • TIMA Laboratory;CNES;TIMA Laboratory

  • Venue:
  • IOLTS '05 Proceedings of the 11th IEEE International On-Line Testing Symposium
  • Year:
  • 2005

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Abstract

In this paper are first summarized representative examples of anomalies observed in systems operating on-board satellites as the consequence of the effects of radiation on integrated circuit, showing that Single Event Upsets (SEU) are a major concern. An approach to predict the sensitivity to SEUs of a software application running on a processor-based architecture is then proposed. It is based on fault injection experiments allowing estimating the average rate of program dysfunctions per upset. This error rate, if combined with static cross-section figures obtained from radiation ground testing, provides an estimation of the target program error rate. The efficiency of this two-step approach was demonstrated by results obtained when applying it to various processors.