Bus Architectures for Safety-Critical Embedded Systems
EMSOFT '01 Proceedings of the First International Workshop on Embedded Software
An Overview of Formal Verification for the Time-Triggered Architecture
FTRTFT '02 Proceedings of the 7th International Symposium on Formal Techniques in Real-Time and Fault-Tolerant Systems: Co-sponsored by IFIP WG 2.2
Model checking for the practical verificationist: a user's perspective on SAL
Proceedings of the second workshop on Automated formal methods
Easy parameterized verification of biphase mark and 8n1 protocols
TACAS'06 Proceedings of the 12th international conference on Tools and Algorithms for the Construction and Analysis of Systems
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We report the first formal verification of a reintegration protocol for a safety-critical distributed embedded system. A reintegration protocol increases system survivability by allowing a transiently-faulty node to regain state. The protocol is verified in the Symbolic Analysis Laboratory (SAL), where bounded model-checking and decision procedures are used to verify infinite-state systems by k-induction. The protocol and its environment are modeled using a recently-developed explicit real-time model. Because k-induction has exponential complexity, we optimize this model to reduce the size of k necessary for the verification and to make $k$ invariant to the number of nodes. A corollary of the verification is that a clique avoidance property is satisfied.