Design of a Configurable Embedded Processor Architecture for DSP Functions

Authors:
Hong Yue;Ming-che Lai;Kui Dai;Zhi-ying Wang
Affiliations:
National University of Defense Technology, School of Computer, Changsha, Hunan 410073, P. R. China;National University of Defense Technology, School of Computer, Changsha, Hunan 410073, P. R. China;National University of Defense Technology, School of Computer, Changsha, Hunan 410073, P. R. China;National University of Defense Technology, School of Computer, Changsha, Hunan 410073, P. R. China
Venue:
ICPADS '05 Proceedings of the 11th International Conference on Parallel and Distributed Systems - Workshops - Volume 02
Year:
2005

Citing 0
Cited 2

Integrated video motion estimator with Retinex-like pre-processing for robust motion analysis in automotive scenarios: algorithmic and real-time architecture design

Journal of Real-Time Image Processing
Design of a low-power embedded processor architecture using asynchronous function units

ACSAC'07 Proceedings of the 12th Asia-Pacific conference on Advances in Computer Systems Architecture

Quantified Score

Hi-index	0.00

Visualization

Abstract

Most of the embedded applications are served today by general-purpose processors or special-purpose ASIC processors containing hundreds to thousands of ALUs. While such solutions are efficient, they lack flexibility and are not feasible for certain embedded applications. ASIP(Application Specific Instruction Processor) design methodology can not only satisfy the functionality and performance requirements of the embedded systems but also flexible. So it is widely adopted in embedded processor design domain. For the widely adopting of digital signal processing in the embedded applications, this paper studies a configurable VLIW processor architecture based on TTA(Transport Triggered Architecture) for high performance digital signal processing in embedded systems. The methodology of ASIP design is applied and some handle optimizations are taken. It is shown that it has high performance to run the digital signal processing kernel applications, and its simplicity and flexibility encourages for further development with tuned functionality.