Instruction Based Memory Distance Analysis and its Application

  • Authors:

  • Changpeng Fang;Steve Carr;Soner Onder;Zhenlin Wang

  • Affiliations:

  • Department of Computer Science Michigan Technological University;Department of Computer Science Michigan Technological University;Department of Computer Science Michigan Technological University;Department of Computer Science Michigan Technological University

  • Venue:
  • Proceedings of the 14th International Conference on Parallel Architectures and Compilation Techniques
  • Year:
  • 2005

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Abstract

Feedback-directed Optimization has become an increasingly important tool in designing and building optimizing compilers as it provides a means to analyze complex program behavior that is not possible using traditional static analysis. Feedback-directed optimization offers the compiler opportunities to analyze and optimize the memory behavior of programs even when traditionalarray-based analysis not applicable. As a result, both floatingpoint and integer programs can benefit memory hierarchy optimization. In this paper we examine the notion of memory distance as it is applied to the instruction space of a program and to feedback-quantifiable directed optimization. Memory distance is dejined as a dynamic distance in terms of memory references between two accesses to the same memory location. We use memory distance to predict the miss rates of instructions in a program. Using the miss rates, we then identifi the programýs critical instructions the set of high miss instructions whose cumulative misses account for 95% of the L2 cache misses in the program - in both integer and floating-point programs. Our experiments show that memory distance analysis can effectively identified critical instructions in both integer and floating-point programs. Additionally, we apply memory-distance analysis to memory disambiguation in out-of-order issue processors, using those distances to determinewhen a load may be speculated ahead of apreceding store. Our experiments show that memory-distance-based disambiguation on average achieves within 5-10% of the performance gain of the store set technique which requires hardware table.