Zippy - A coarse-grained reconfigurable array with support for hardware virtualization

Authors:
Christian Plessl;Marco Platzner
Affiliations:
Computer Engineering and Networks Lab ETH Zürich, Switzerland;Department of Computer Science University of Paderborn, Germany
Venue:
ASAP '05 Proceedings of the 2005 IEEE International Conference on Application-Specific Systems, Architecture Processors
Year:
2005

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Abstract

This paper motivates the use of hardware virtualization on coarse-grained reconfigurable architectures. We introduce Zippy, a coarse-grained multi-context hybrid CPU with architectural support for efficient hardware virtualization. The architectural details and the corresponding tool flow are outlined. As a case study, we compare the nonvirtualized and the virtualized execution of an ADPCM decoder.