Yield analysis for self-repairable MEMS devices
Analog Integrated Circuits and Signal Processing
System-on-Chip Test Architectures: Nanometer Design for Testability
System-on-Chip Test Architectures: Nanometer Design for Testability
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In this paper, a self-repairable MEMS (SRMEMS) accelerometer design is proposed. The accelerometer consists of (n + m) identical modules: n of them serve as the main device, while the remaining m modules act as the redundancy. If any of the working module in the main device is found faulty, the control circuit will replace it with a good redundant module. In this way, the faulty device can be self-repaired through redundancy. The sensitivity loss due to device modularization can be well compensated by different design alternatives. The yield model for MEMS redundancy repair is developed. The simulation results show that the BISR (built-in self-repair) design leads to effective yield increase compared to non-BISR design, especially for a moderate non-BISR yield. By implementing the fault tolerance feature into MEMS devices, the yield as well as the reliability of a MEMS device implemented in a SoC can be improved.