Improving Thermal-Safe Test Scheduling for Core-Based Systems-on-Chip Using Shift Frequency Scaling

Authors:
Enkelejda Tafaj;Paul Rosinger;Bashir M. Al-Hashimi;Krishnendu Chakrabarty
Affiliations:
University of Southampton;University of Southampton;University of Southampton;Duke University
Venue:
DFT '05 Proceedings of the 20th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
Year:
2005

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Test scheduling with thermal optimization for network-on-chip systems using variable-rate on-chip clocking

Proceedings of the conference on Design, automation and test in Europe: Proceedings

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Abstract

Recently we have shown how hot-spots during test can be avoided without unnecessarily increasing the testing time by using a thermal-safe test scheduling approach [14]. In this work, we investigate the impact of scan shift frequency scaling on the thermal-safe test scheduling performance and propose an algorithm which embeds shift frequency scaling into the test scheduling process. Experimental results show that this approach offers shorter overall testing times and significantly improved ability of meeting tight thermal constraints when compared to existing thermal-safe test scheduling approach based on a fixed scan shift frequency.