Scenarios for validating systemC descriptions
ICC'08 Proceedings of the 12th WSEAS international conference on Circuits
SC2SCFL: automated systemC to systemCFLtranslation
SAMOS'07 Proceedings of the 7th international conference on Embedded computer systems: architectures, modeling, and simulation
Formal verification of SystemCFLspecifications using SPIN
MINO'06 Proceedings of the 5th WSEAS international conference on Microelectronics, nanoelectronics, optoelectronics
Verifying systemC with scenario
VECoS'08 Proceedings of the Second international conference on Verification and Evaluation of Computer and Communication Systems
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As feature sizes continue to decrease and clock rates and device count on a VLSI chip increase, it becomes increasingly more difficult to maintain yields at their present levels. Process variation, noise and spot defects create very costly problems for ...