Metastability Requirements for a 2 GHz CMOS ΔΣ Modulator

  • Authors:

  • Peter Stubberud;Elias H. Dagher

  • Affiliations:

  • University of Nevada at Las Vegas;Skyworks Solutions

  • Venue:
  • ICSENG '05 Proceedings of the 18th International Conference on Systems Engineering
  • Year:
  • 2005

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Abstract

This paper presents the design of a second order, single bit, CMOS, continuous-time analog to digital delta sigma modulator (ΔΣΜ) which samples at 2 GHz, consumes 18 mW at 1.8 V and has a 79 dB signal-to-noise ratio (SNR) over a 1.23 MHz bandwidth. Because the comparator s metastability limited the ΔΣΜ s performance, this paper focuses on the design, analysis and testing of the ΔΣΜ s comparator. The ΔΣΜ s measured performance is also presented.