SIMD Optimization in COINS Compiler Infrastructure

  • Authors:
  • Mitsugu Suzuki;Nobuhisa Fujinami;Takeaki Fukuoka;Tan Watanabe;Ikuo Nakata

  • Affiliations:
  • University of Electro-Communications;Sony Computer Entertainment Inc.;Kanrikogaku Kenkyusho, Ltd.;University of Electro-Communications;Hosei University

  • Venue:
  • IWIA '05 Proceedings of the Innovative Architecture on Future Generation High-Performance Processors and Systems
  • Year:
  • 2005

Quantified Score

Hi-index 0.00

Visualization

Abstract

Recently, register files in highly parallel superscalar processors tend to have large chip area and many access ports. This trend causes problems with chip-size, access time and power consumption. As one of the methods for solving these problems, we ...