Fast algorithms for IR voltage drop analysis exploiting locality
Proceedings of the 48th Design Automation Conference
Efficient algorithms for fast IR drop analysis exploiting locality
Integration, the VLSI Journal
IR-drop in on-chip power distribution networks of ICs with nonuniform power consumption
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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With increasing design complexity, as well as continued scaling of supplies, the design and analysis of power/ground distribution networks poses a difficult problem in modern IC design. We propose several closed-form solutions for power distribution network optimization and analysis which explicitly take into consideration the mesh topology of modern power-ground networks. Our analysis and optimization methods have essentially zero runtime for global power grids, and are therefore usable for layout optimization. Experimental validation shows that our IR drop estimation method has almost perfect correlation with true IR drop. Our closed-form sizing solutions save up to 32% area while preserving the peak IR drop; alternatively, we can reduce peak IR drop by up to 33% while preserving the total area of the power distribution network. Our iterated incremental power distribution network improvement technique achieves up to 33% reduction (in one iteration) in peak IR drop over uniformly sized meshes. We also introduce a measure for robustness of power distribution networks to current and process variations.