Area and Power Efficient VLSI Architecture for Computing Pseudo Inverse of Channel Matrix in a MIMO Wireless System

Authors:
Zahid Khan;Tughrul Arslan;John S. Thompson;Ahmet T. Erdogan
Affiliations:
University of Edinburgh;University of Edinburgh;University of Edinburgh;University of Edinburgh
Venue:
VLSID '06 Proceedings of the 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design
Year:
2006

Citing 0
Cited 1

VLSI Implementation of a Complete Pipeline MMSE Detector for a 4 × 4 MIMO-OFDM Receiver

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences

Quantified Score

Hi-index	0.00

Visualization

Abstract

Weight and size are the bottlenecks of portable wireless systems which are in turn dependent on area and power consumption of electronic systems. The situation becomes even worse if wireless systems are equipped with Multiple Input and Multiple Output (MIMO) technology which involves highly complex signal processing. This paper proposes an area and power efficient VLSI architecture for computing the pseudo inverse of augmented channel matrix used in MIMO systems. Results indicate 25% area and 24% power reduction compared to previous architecture in the literature without degrading the BER performance.