Hybrid CMOS-STTRAM non-volatile FPGA: design challenges and optimization approaches
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
FPGA-RR: an enhanced FPGA architecture with RRAM-based reconfigurable interconnects (abstract only)
Proceedings of the ACM/SIGDA international symposium on Field Programmable Gate Arrays
Exploring Boolean and non-Boolean computing with spin torque devices
Proceedings of the International Conference on Computer-Aided Design
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This paper describes a real time reconfigurable (RTR) micro- FPGA using new non volatile memory. Magnetic tunneling junctions (MTJ) used in Magnetic random access memories (MRAM) are compatible with classical CMOS processes. Moreover remanent property of such a memory could limit configuration time and power consumption required at each power up of the device. Each configuration memory point has to be readable independently from each other, which makes this approach radically different from the classical memory array one.