Evaluating the Impact of Data Encoding Techniques on the Power Consumption in Networks-on-Chip

Authors:
Jose C. S. Palma;Ricardo A. L. Reis;Leandro Soares Indrusiak;Alberto Garcia Ortiz;Manfred Glesner;Fernando G. Moraes
Affiliations:
PPGC - II - UFRGS, Brazil;PPGC - II - UFRGS, Brazil;MES - TU Darmstadt, Germany;MES - TU Darmstadt, Germany;MES - TU Darmstadt, Germany;PPGCC - FACIN - PUCRS, Brazil
Venue:
ISVLSI '06 Proceedings of the IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures
Year:
2006

Citing 0
Cited 1

PMD: A Low-Power Code for Networks-on-Chip Based on Virtual Channels

Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation

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Abstract

This paper presents a floorplanning method based on particle swarm optimization (PSO). We adopted the B*-tree floorplan structure to generate an initial stage with overlap free for placement and utilized PSO to find out the potential optimal placement ...