PMD: A Low-Power Code for Networks-on-Chip Based on Virtual Channels

Authors:
Alberto García-Ortiz;Leandro S. Indrusiak;Tudor Murgan;Manfred Glesner
Affiliations:
Anafocus, Seville, Spain 41092;Institute of Microelectronic Systems, Darmstadt University of Technology, Darmstadt, Germany D-64283;Institute of Microelectronic Systems, Darmstadt University of Technology, Darmstadt, Germany D-64283;Institute of Microelectronic Systems, Darmstadt University of Technology, Darmstadt, Germany D-64283
Venue:
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation
Year:
2009

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Abstract

Virtual channels are a common alternative for providing quality-of-service to Networks-on-Chip. A drawback of the approach is the increased power consumption because of the suppression of correlation between consecutive flits. This work proposes an architecture based on low-power coding to overcome the aforementioned problem. The technique requires a minimum overhead, while obtaining a significant power reduction (45% in the average case). Exhaustive experimental simulations are provided to demonstrate the advantages of the proposed architecture.