VHDL Core for 1024-Point Radix-4 FFT Computation

• Authors: Jose Alberto Vite-Frias;Rene de Jesus Romero-Troncoso;Alejandro Ordaz-Moreno
• Venue: RECONFIG '05 Proceedings of the 2005 International Conference on Reconfigurable Computing and FPGAs (ReConFig'05) on Reconfigurable Computing and FPGAs
• Year: 2005

This paper shows the development of a 1024-point radix-4 FFT VHDL core for applications in hardware signal processing, targeting low-cost FPGA technologies. The developed core is targeted into a Xilinx® Spartan™-3 XC3S200 FPGA with the inclusion of a VGA display interface and an external 16-bit data acquisition system for performance evaluation purposes. Several tests were performed in order to verify FFT core functionality, besides the time performance analysis highlights the core advantages over commercially available DSPs and Pentium-based PCs. The core is compared with similar third party IP cores targeting resourceful FPGA technologies. The novelty of this work is to provide a low-cost, resource efficient core for spectrum analysis applications.