5Gbps serial link transmitter with pre-emphasis

Authors:
Chih-Hsien Lin;Chung-Hong Wang;Shyh-Jye Jou
Affiliations:
National Central University, Chung-Li, Taiwan R.O.C.;National Central University, Chung-Li, Taiwan R.O.C.;National Central University, Chung-Li, Taiwan R.O.C.
Venue:
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Year:
2003

Citing 3
Cited 2

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A 10Gb/s transmitter with multi-tap FIR pre-emphasis in 0.18μm CMOS technology

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Reducing data dependent jitter utilising adaptive FIR pre-emphasis in 0.18µm CMOS

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Abstract

High-speed serial link that achieves Gbps has the advantage of low cost and thus become popular. In this paper, we will implement the high-speed data serial link transceiver and demonstrate the pre-emphasis circuit. The overall circuit is implemented in TSMC 0.18um 1P6M 1.8v CMOS process. The performance of the transceiver can reach 5Gbps over the 10-meter long cable.