Complexity-based program phase analysis and classification
Proceedings of the 15th international conference on Parallel architectures and compilation techniques
Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture
Quantifying hardware counter sampling error in computer system workload characterization
Quantifying hardware counter sampling error in computer system workload characterization
Vision for liquid architecture
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
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Workload characterization is vital to the design and performance analysis of new generation computer architectures. In many simulation-based performance analysis studies, only a small "representative" portion of the total workload execution is used for analysis. This is due to the prohibitive amount of time it takes to simulate or execute a workload to completion. Methods of choosing the portion of the workload for use vary from sampling to simply simulating an arbitrary number of instructions after initialization. The primary challenge in utilizing only a portion of a workload in a performance analysis study is ensuring that it accurately represents the whole. A significant amount of research has shown that often, the "representativeness" of a selected portion of a workload is quite low. This work identifies the execution phases and some of their behavioral characteristics in a subset of the SPEC95 benchmark suite. We quantitatively and qualitatively show that after several billion executed instructions, many commonly used workloads exhibit phases of execution characterized by previously unseen behavior. Additionally, these phases are characterized by very different performance behavior.