Dynamo: a transparent dynamic optimization system
PLDI '00 Proceedings of the ACM SIGPLAN 2000 conference on Programming language design and implementation
The working set model for program behavior
Communications of the ACM
Power aware microarchitecture resource scaling
Proceedings of the conference on Design, automation and test in Europe
Process cruise control: event-driven clock scaling for dynamic power management
CASES '02 Proceedings of the 2002 international conference on Compilers, architecture, and synthesis for embedded systems
Automatically characterizing large scale program behavior
Proceedings of the 10th international conference on Architectural support for programming languages and operating systems
SPEClite: using representative samples to reduce SPEC CPU2000 workload
WWC '01 Proceedings of the Workload Characterization, 2001. WWC-4. 2001 IEEE International Workshop
Examining performance differences in workload execution phases
WWC '01 Proceedings of the Workload Characterization, 2001. WWC-4. 2001 IEEE International Workshop
Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture
EVAL: Utilizing processors with variation-induced timing errors
Proceedings of the 41st annual IEEE/ACM International Symposium on Microarchitecture
Thread motion: fine-grained power management for multi-core systems
Proceedings of the 36th annual international symposium on Computer architecture
Predictive-flow-queue-based energy optimization for gigabit ethernet controllers
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A model to exploit power-performance efficiency in superscalar processors via structure resizing
Proceedings of the 20th symposium on Great lakes symposium on VLSI
Program behavior prediction using a statistical metric model
Proceedings of the ACM SIGMETRICS international conference on Measurement and modeling of computer systems
iFDOR: dynamic rerouting on-chip
Proceedings of the Fifth International Workshop on Interconnection Network Architecture: On-Chip, Multi-Chip
Journal of Computer Science and Technology
Memory access aware on-line voltage control for performance and energy optimization
Proceedings of the International Conference on Computer-Aided Design
Microvisor: a runtime architecture for thermal management in chip multiprocessors
Transactions on High-Performance Embedded Architectures and Compilers IV
Predictive power management for multi-core processors
ISCA'10 Proceedings of the 2010 international conference on Computer Architecture
Making data prefetch smarter: adaptive prefetching on POWER7
Proceedings of the 21st international conference on Parallel architectures and compilation techniques
Runtime performance projection model for dynamic power management
ACSAC'07 Proceedings of the 12th Asia-Pacific conference on Advances in Computer Systems Architecture
Cross-layer virtual observers for embedded multiprocessor system-on-chip (MPSoC)
Proceedings of the 11th International Workshop on Adaptive and Reflective Middleware
Applying effective dynamic frequency scaling method in contactless smart card
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
SMT-centric power-aware thread placement in chip multiprocessors
PACT '13 Proceedings of the 22nd international conference on Parallel architectures and compilation techniques
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Computer systems increasingly rely on adaptive dynamic management of their operations to balance power and performance goals. Such dynamic adjustments rely heavily on the system's ability to observe and predict workload behavior and system responses. The authors characterize the workload behavior of full benchmarks running on server-class systems using hardware performance counters. Based on these characterizations, they developed a set of long-term value, gradient, and duration prediction techniques that can help systems to provision resources.