Design Methods for Multiple-Valued Input Address Generators

Authors:
Tsutomu Sasao
Affiliations:
Kyushu Institute of Technology, Japan
Venue:
ISMVL '06 Proceedings of the 36th International Symposium on Multiple-Valued Logic
Year:
2006

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Abstract

This paper presents an asynchronous encoding scheme using a MVL(Multi-Value Logic). This scheme reduces not only the number of wires but also the switching activities. It is achieved by the two proposed data encoding methods, RT/NRT(Return to Ternary/ ...