Applying dynamic reconfiguration for fault tolerance in fine-grained logic arrays
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Mobile Networks and Applications
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Wireless sensor networks require the design of highly energy-efficient and yet flexible sensor nodes, which is very difficult to realize with classical architectures. In this paper we propose a new approach based on the tight coupling of a small processor with a dynamically reconfigurable function unit that is optimized for wireless sensor network applications. Dynamic reconfiguration is part of the regular operation mode and the key concept to achieve a small design that provides sufficient performance, high adaptivity and good energy-efficiency.