Reducing measurement uncertainty in a DSP-based mixed-signal test environment without increasing test time

Authors:
Chris S. Taillefer;Gordon W. Roberts
Affiliations:
Microelectronics and Computer Systems Laboratory, McGill University, Montreal, QC, Canada;DFT Microsystems Canada, Inc., Montreal, Quebec, Canada
Venue:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Year:
2005

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Abstract

Noise, especially clock jitter effects, in a DSP-based mixed-signal test system severely limits its measurement accuracy. This is especially acute in high-frequency sampling systems. This paper illustrates an efficient method to improve measurement accuracy and precision by reducing the uncertainty of a DSP-based measurement without an increase in test time. A new digitizer architecture is introduced. The digitizer was fabricated in a 0.18-µm CMOS process. Experimental results were obtained validating the proposed technique.