Exact emulation of a priority queue with a switch and delay lines

  • Authors:
  • A. D. Sarwate;V. Anantharam

  • Affiliations:
  • Department of Electrical Engineering and Computer Sciences, University of California, Berkeley;Department of Electrical Engineering and Computer Sciences, University of California, Berkeley

  • Venue:
  • Queueing Systems: Theory and Applications
  • Year:
  • 2006

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Abstract

All-optical packet switched networking is hampered by the problem of realizing viable queues for optical packets. Packets can be buffered in delay lines, but delay lines do not functionally emulate queues from an input-output point of view. In this paper we consider the problem of exact emulation of a priority queue of size K using a switching system comprised of a switch of size (M + 1) 脳 (M + 1), which has one distinguished input for external arrivals, one distinguished output for external departures, and fixed-length delay lines of lengths L1, L2, ..., LM connecting the other inputs and outputs in pairs. We measure the complexity of such an emulation by M + 1. We prove that $$M \ge \lceil \log (K -1) \rceil$$ and present a construction which works with $$M = O(\sqrt{K})$$ ; further, in our construction $$\sum_{m=1}^M L_m = K + O(\sqrt{K})$$ . We also sketch an idea for an all-optical packet switched communication network architecture based on approximate emulation of priority queues of finite size using switches and delay lines, with erasure control coding at the packet level.