Compilers: principles, techniques, and tools
Compilers: principles, techniques, and tools
Multithreaded processor architectures
IEEE Spectrum
MediaBench: a tool for evaluating and synthesizing multimedia and communicatons systems
MICRO 30 Proceedings of the 30th annual ACM/IEEE international symposium on Microarchitecture
Lx: a technology platform for customizable VLIW embedded processing
Proceedings of the 27th annual international symposium on Computer architecture
Understanding the Linux Kernel, Second Edition
Understanding the Linux Kernel, Second Edition
Balancing register pressure and context-switching delays in ASTI systems
Proceedings of the 2005 international conference on Compilers, architectures and synthesis for embedded systems
MANTIS OS: an embedded multithreaded operating system for wireless micro sensor platforms
Mobile Networks and Applications
iGPU: exception support and speculative execution on GPUs
Proceedings of the 39th Annual International Symposium on Computer Architecture
Compiler support for lightweight context switching
ACM Transactions on Architecture and Code Optimization (TACO) - Special Issue on High-Performance Embedded Architectures and Compilers
Moths: Mobile threads for on-chip networks
ACM Transactions on Embedded Computing Systems (TECS) - Special section on ESTIMedia'12, LCTES'11, rigorous embedded systems design, and multiprocessor system-on-chip for cyber-physical systems
Hardware architectural support for control systems and sensor processing
ACM Transactions on Embedded Computing Systems (TECS) - Special issue on application-specific processors
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In this paper, we present a methodology for low-cost and rapid context switch for multithreaded embedded processors with real-time guarantees. Context-switch, which involves saving and restoring the thread state, has constituted not only a large performance overhead for many multithreaded embedded systems, but also an obstacle creating a significant delay in the response time for many time-critical control applications. The proposed technique exploits application information extracted during compile time to make sure that only a minimal amount of thread state is saved and subsequently restored on preemption. The register liveness within the application inner loops is analyzed and a few points, referred to as switch points, are identified where the program has minimal number of live registers. At run-time the preemption point is deferred to a switch point and the Real-Time Operating System (RTOS) kernel invokes a switch point specific code generated by the compiler to save and restore the thread state in a custom fashion. Through the utilization of these novel mechanisms, a drastic improvement on both performance and response time is achieved. The presented experimental results demonstrate the effectiveness of the proposed technique on a number of widely-used computational kernels and embedded applications.