A nonredundant ternary CAM circuit for network search engines

Authors:
Mohammad J. Akhbarizadeh;Mehrdad Nourani;Deepak S. Vijayasarathi;Poras T. Balsara
Affiliations:
Cisco Systems Inc., San Jose, CA;Department of Electrical Engineering, University of Texas at Dallas, Richardson, TX;Intel Corporation, Folsom, CA;Department of Electrical Engineering, University of Texas at Dallas, Richardson, TX
Venue:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Year:
2006

Citing 9
Cited 1

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Abstract

An optimized Ternary CAM concept is introduced for the hardware search engines in high-speed Internet routers. Our design employs w + 1 RAM bits to store a word of size w, whereas a conventional TCAM needs 2w RAM bits for the same word size. Based on this concept an 8-bit cluster is designed out of 9 SRAM bits, used as the basic building block of our Prefix-CAM (PCAM) structure. Four such clusters merge to store a 32-bit IPv4 prefix, thus, configuring a PCAM suitable for Internet packet forwarding. This PCAM module employs 48% less SRAM cells and a total of 22% less transistors plus 50% less address decode interconnects compared to a conventional TCAM, for equal storage size and equal functionality. We show that PCAM can be employed for multifield packet classification. Other factors, such as lookup speed and power dissipation, are not adversely affected.