Engineering a simple, efficient code-generator generator
ACM Letters on Programming Languages and Systems (LOPLAS)
Specifying representations of machine instructions
ACM Transactions on Programming Languages and Systems (TOPLAS)
The SimpleScalar tool set, version 2.0
ACM SIGARCH Computer Architecture News
The Verilog hardware description language (4th ed.)
The Verilog hardware description language (4th ed.)
EXPRESSION: a language for architecture exploration through compiler/simulator retargetability
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Automatic Derivation of Code Generators from Machine Descriptions
ACM Transactions on Programming Languages and Systems (TOPLAS)
Facile: a language and compiler for high-performance processor simulators
Proceedings of the ACM SIGPLAN 2001 conference on Programming language design and implementation
VHDL, Hardware Description and Design
VHDL, Hardware Description and Design
Machine Descriptions to Build Tools for Embedded Systems
LCTES '98 Proceedings of the ACM SIGPLAN Workshop on Languages, Compilers, and Tools for Embedded Systems
Describing instruction set processors using nML
EDTC '95 Proceedings of the 1995 European conference on Design and Test
Automatic Generation of Microarchitecture Simulators
ICCL '98 Proceedings of the 1998 International Conference on Computer Languages
Pipeline Descriptions for Retargetable Compilers: A Decoupled Approach
Pipeline Descriptions for Retargetable Compilers: A Decoupled Approach
Applying programming language implementation techniques to processor simulation
Applying programming language implementation techniques to processor simulation
The next generation software program
International Journal of Parallel Programming - Special issue: The next generation software program
CASL: A rapid-prototyping language for modern micro-architectures
Computer Languages, Systems and Structures
Demystifying magic: high-level low-level programming
Proceedings of the 2009 ACM SIGPLAN/SIGOPS international conference on Virtual execution environments
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It is currently difficult fully to understand the performance of a modern dynamic programming language system, such as Java. One must observe execution in the context of specific architectures in order to evaluate the effects of optimizations. To do this we require simulators and compiler back-ends for a wide variety of machines that are capable of handling the demands of today's dynamically compiled languages and their environments. We introduce here CISL, a machine description language specifically designed for the automatic generation of simulators and compiler back-end. CISL is a class-based language with a C/Java style syntax aimed at extensibility. CISL is processed by tools to generate descriptions of architectures represented in an intermediate form; the descriptions are then further combined and processed to produce efficient compiler and simulator components designed to "plug in" to existing frameworks. CISL provides the necessary flexibility to advance the simulation paradigm to match the state of the art in computer systems.