Automata-Theoretic techniques for modal logics of programs
Journal of Computer and System Sciences
Memory-efficient algorithms for the verification of temporal properties
Formal Methods in System Design - Special issue on computer-aided verification: general methods
IEEE Transactions on Software Engineering - Special issue on formal methods in software practice
Property specification patterns for finite-state verification
FMSP '98 Proceedings of the second workshop on Formal methods in software practice
Model checking
Directed explicit model checking with HSF-SPIN
SPIN '01 Proceedings of the 8th international SPIN workshop on Model checking of software
Distributed LTL model-checking in SPIN
SPIN '01 Proceedings of the 8th international SPIN workshop on Model checking of software
Efficient omega-Regular Language Containment
CAV '92 Proceedings of the Fourth International Workshop on Computer Aided Verification
Distributed explicit fair cycle detection: set based approach
SPIN'03 Proceedings of the 10th international conference on Model checking software
Proceedings of the 10th ACM Symposium on Modeling, analysis, and simulation of wireless and mobile systems
Distributed verification: exploring the power of raw computing power
FMICS'06/PDMC'06 Proceedings of the 11th international workshop, FMICS 2006 and 5th international workshop, PDMC conference on Formal methods: Applications and technology
Ten years of analyzing actors: Rebeca experience
Formal modeling
Cluster-Based LTL model checking of large systems
FMCO'05 Proceedings of the 4th international conference on Formal Methods for Components and Objects
Action-based discovery of satisfying subsets: A distributed method for model correction
Information and Software Technology
Local Verification Using a Distributed State Space
Fundamenta Informaticae
Hi-index | 0.00 |
We propose a parallel distributed memory on-the-fly algorithm for enumerative LTL model checking. The algorithm is designed for networks of workstations communicating via MPI. The detection of cycles (faulty runs) effectively employs the so-called back-level edges. In particular, a parallel level synchronized breadth-first search of the graph is performed to discover all back-level edges, and for each level the back-level edges are checked in parallel by a nested search procedure to confirm or refute the presence of a cycle. Several improvements of the basic algorithm are presented and advantages and drawbacks of their application to distributed LTL model checking are discussed.