Simulation and Verification of Asynchronous Systems by means of a Synchronous Model

Authors:
Nicolas Halbwachs;Louis Mandel
Affiliations:
Verimag, Grenoble, France;Verimag, Grenoble, France
Venue:
ACSD '06 Proceedings of the Sixth International Conference on Application of Concurrency to System Design
Year:
2006

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Abstract

Synchronous Data Flow Graphs (SDFGs) are a useful tool for modeling and analyzing embedded data flow applications, both in a single processor and a multiprocessing context or for application mapping on platforms. Throughput analysis of these SDFGs is ...