On the formal verification of systems of synchronous software components

  • Authors:
  • Henning Günther;Stefan Milius;Oliver Möller

  • Affiliations:
  • Institut für Theoretische Informatik, Technische Universität Braunschweig, Germany;Institut für Theoretische Informatik, Technische Universität Braunschweig, Germany;Verified Systems International GmbH, Bremen, Germany

  • Venue:
  • SAFECOMP'12 Proceedings of the 31st international conference on Computer Safety, Reliability, and Security
  • Year:
  • 2012

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Abstract

Large asynchronous systems composed from synchronous components (so called GALS--globally asynchronous, locally synchronous--systems) pose a challenge to formal verification. We present an approach which abstracts components with contracts capturing the behavior by a mixture of temporal logic formulas and non-deterministic state machines. Formal verification of global system properties is then done transforming a network of contracts to model checking tools such as Promela/SPIN or UPPAAL. Synchronous components are implemented in Scade, and contract validation is done using the Scade Design Verifier for formal verification. We also discuss first experiences from an ongoing industrial case study applying our approach.