A Monitoring-Aware Network-on-Chip Design Flow

Authors:
Calin Ciordas;Andreas Hansson;Kees Goossens;Twan Basten
Affiliations:
Eindhoven University of Technology, The Netherlands;Eindhoven University of Technology, The Netherlands;Philips Research Laboratories Eindhoven, The Netherlands;Eindhoven University of Technology, The Netherlands
Venue:
DSD '06 Proceedings of the 9th EUROMICRO Conference on Digital System Design
Year:
2006

Citing 0
Cited 2

Transaction-Based Communication-Centric Debug

NOCS '07 Proceedings of the First International Symposium on Networks-on-Chip
A monitoring-aware network-on-chip design flow

Journal of Systems Architecture: the EUROMICRO Journal

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Abstract

Networks-on-chip (NoC) are a scalable interconnect solution for systems on chip and are rapidly becoming reality. Monitoring is a key enabler for debugging or performance analysis and quality-of-service techniques. The NoC design problem and the NoC monitoring problem cannot be treated in isolation. We propose a monitoring-aware NoC design flow able to take into account the monitoring requirements in general. We illustrate our flow with a debug driven monitoring case study of transaction monitoring. By treating the NoC design and monitoring problems in synergy, the area cost of monitoring can be limited to 3-20% in general.