SeaStar Interconnect: Balanced Bandwidth for Scalable Performance

Authors:
Ron Brightwell;Kevin T. Pedretti;Keith D. Underwood;Trammell Hudson
Affiliations:
Sandia National Laboratories;Sandia National Laboratories;Sandia National Laboratories;OS Research
Venue:
IEEE Micro
Year:
2006

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Abstract

The SeaStar, a new ASIC from Cray, is a full system-on-chip design that integrates high-speed serial links, a 3D router, and traditional network interface functionality, including an embedded processor in a single chip.