Deadlock-Free Message Routing in Multiprocessor Interconnection Networks
IEEE Transactions on Computers
Planar-adaptive routing: low-cost adaptive networks for multiprocessors
ISCA '92 Proceedings of the 19th annual international symposium on Computer architecture
A New Theory of Deadlock-Free Adaptive Routing in Wormhole Networks
IEEE Transactions on Parallel and Distributed Systems
Adaptive Deadlock- and Livelock-Free Routing with All Minimal Paths in Torus Networks
IEEE Transactions on Parallel and Distributed Systems
The SP2 high-performance switch
IBM Systems Journal
The MIT Alewife machine: architecture and performance
ISCA '95 Proceedings of the 22nd annual international symposium on Computer architecture
An efficient, fully adaptive deadlock recovery scheme: DISHA
ISCA '95 Proceedings of the 22nd annual international symposium on Computer architecture
A necessary and sufficient condition for deadlock-free wormhole routing
Journal of Parallel and Distributed Computing
Compressionless Routing: A Framework for Adaptive and Fault-Tolerant Routing
IEEE Transactions on Parallel and Distributed Systems
The SGI Origin: a ccNUMA highly scalable server
Proceedings of the 24th annual international symposium on Computer architecture
Improving the performance of bristled CC-NUMA systems using virtual channels and adaptivity
ICS '99 Proceedings of the 13th international conference on Supercomputing
Characterization of Deadlocks in k-ary n-Cube Networks
IEEE Transactions on Parallel and Distributed Systems
Flexible and Efficient Routing Based on Progressive Deadlock Recovery
IEEE Transactions on Computers
The directory-based cache coherence protocol for the DASH multiprocessor
ISCA '90 Proceedings of the 17th annual international symposium on Computer Architecture
A Formal Model of Message Blocking and Deadlock Resolution in Interconnection Networks
IEEE Transactions on Parallel and Distributed Systems
Some Deadlock Properties of Computer Systems
ACM Computing Surveys (CSUR)
A Distributed Graph Algorithm: Knot Detection
ACM Transactions on Programming Languages and Systems (TOPLAS)
A Necessary and Sufficient Condition for Deadlock-Free Adaptive Routing in Wormhole Networks
IEEE Transactions on Parallel and Distributed Systems
Optimized Routing in the Cray T3D
PCRCW '94 Proceedings of the First International Workshop on Parallel Computer Routing and Communication
The Alpha 21364 Network Architecture
HOTI '01 Proceedings of the The Ninth Symposium on High Performance Interconnects
IEEE Transactions on Parallel and Distributed Systems
Reducing the Interconnection Network Cost of Chip Multiprocessors
NOCS '08 Proceedings of the Second ACM/IEEE International Symposium on Networks-on-Chip
CTC: An end-to-end flow control protocol for multi-core systems-on-chip
NOCS '09 Proceedings of the 2009 3rd ACM/IEEE International Symposium on Networks-on-Chip
NOCS '10 Proceedings of the 2010 Fourth ACM/IEEE International Symposium on Networks-on-Chip
Impact of Half-Duplex and Full-Duplex DMA Implementations on NoC Performance
NOCS '10 Proceedings of the 2010 Fourth ACM/IEEE International Symposium on Networks-on-Chip
The connection-then-credit flow control protocol for heterogeneous multicore systems-on-chip
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems - Special issue on the 2009 ACM/IEEE international symposium on networks-on-chip
Virtual channels vs. multiple physical networks: a comparative analysis
Proceedings of the 47th Design Automation Conference
Benefits of selective packet discard in networks-on-chip
ACM Transactions on Architecture and Code Optimization (TACO)
Concurrent hybrid switching for massively parallel systems-on-chip: the CYBER architecture
Proceedings of the 9th conference on Computing Frontiers
Efficient implementation of globally-aware network flow control
Journal of Parallel and Distributed Computing
LIGERO: A light but efficient router conceived for cache-coherent chip multiprocessors
ACM Transactions on Architecture and Code Optimization (TACO) - Special Issue on High-Performance Embedded Architectures and Compilers
Proceedings of the 27th international ACM conference on International conference on supercomputing
TornadoNoC: A lightweight and scalable on-chip network architecture for the many-core era
ACM Transactions on Architecture and Code Optimization (TACO)
PAIS: Parallelism-aware interconnect scheduling in multicores
ACM Transactions on Embedded Computing Systems (TECS) - Special Issue on Design Challenges for Many-Core Processors, Special Section on ESTIMedia'13 and Regular Papers
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Handling deadlocks is essential for providing reliable communication paths between processing nodes in parallel computer systems. The existence of multiple message types and associated intermessage dependencies may cause message-dependent deadlocks in networks that are designed to be free of routing deadlock. Most methods currently used for dealing with message-dependent deadlocks require more system resources than are necessary and/or do not use system resources efficiently. This may have an adverse effect on system performance if resources are scarce. In this paper, we characterize the frequency of message-dependent deadlocks in multiprocessor/multicomputer systems. We also propose a handling technique for message-dependent deadlocks based on progressive deadlock recovery and evaluate its performance with other approaches. Results show that message-dependent deadlocks occur very infrequently under typical circumstances thus, rendering approaches based on avoiding them overly restrictive in the common case. The proposed technique relaxes restrictions considerably, allowing the routing of packets and the handling of message-dependent deadlocks to be much more efficient驴particularly when network resources are scarce.