Variable supply-voltage scheme with 95%-efficiency DC-DC converter for MPEG-4 codec
ISLPED '99 Proceedings of the 1999 international symposium on Low power electronics and design
Design and optimization on dynamic power system for self-powered integrated wireless sensing nodes
ISLPED '05 Proceedings of the 2005 international symposium on Low power electronics and design
Enabling power-efficient DVFS operations on silicon
IEEE Circuits and Systems Magazine
| Hi-index | 0.00 |
In this paper, an integrated adaptive output switching converter is proposed. The design uses a one-cycle control for fast line regulation and a single outer loop for load regulation and fine tuning. A switched-capacitor integrator is introduced in the one-cycle control to obtain positive integration with a single positive power supply, allowing a standard low-cost CMOS fabrication process. To improve the efficiency, a dynamic loss control technique is presented. HSPICE Simulations are performed with transistor models from TSMC 0.35μm N-well CMOS fabrication process. With a supply voltage of 3 V, a voltage ripple of less than 15 mV is measured. The maximum efficiency is 92% with a load power of 475 mW. The converter exhibits a tracking speed of 2 μs/V for both start-up and reference voltage transitions. The recovery time for a 20% load change is approximately 2.6ms. The overall design exhibits superior system robustness to battery perturbations, noise and process variations.