Enabling power-efficient DVFS operations on silicon

  • Authors:
  • Dongsheng Ma;Rajdeep Bondade

  • Affiliations:
  • ECE Department, BI05 Institute, University of Arizona, Tucson, AZ;ECE Department, BI05 Institute, University of Arizona, Tucson, AZ

  • Venue:
  • IEEE Circuits and Systems Magazine
  • Year:
  • 2010

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Abstract

With the perpetual power increase in modern VLSI systems, efficient and effective power management has been critical to next-generation IC designs. To overcome this grand challenge, techniques, such as dynamic voltage/ frequency scaling (DVFS), have been proposed to jointly optimize power, energy and operating performance, leading to significantly improved system reliability, efficiency and battery lifetime. From both system-level and circuit-level perspectives, this paper investigates key design issues, control schemes, circuit architectures and future research directions, involved in the development of application-aware, multiple- and variable-output DC-DC power converters. The article first discusses key multipleoutput converters such as the single-inductor multiple-output (SIMO) DC-DC converters and their system-level integration for DVFS power management, followed by our investigation on various adaptive-output power converter topologies and corresponding design challenges. The paper also addresses the importance of hardware-software co-design for future power management systems. With the integration of the enabling hardware platform, power processing, in addition to the traditional signal processing, rises to become another key factor to next- generation VLSI designs. This naturally enables effective on-chip power tracking, power processing and thermal monitoring. More importantly, it would significantly change traditional design concepts and largely benefit signal processing in return, eventually leading to revolutionary changes on system reliability, performance, efficiency and operating lifetime.