ISLPED '00 Proceedings of the 2000 international symposium on Low power electronics and design
An integrated switching DC-DC converter with dual-mode pulse-train/PWM control
IEEE Transactions on Circuits and Systems II: Express Briefs
Enabling power-efficient DVFS operations on silicon
IEEE Circuits and Systems Magazine
A novel architecture for improving slew rate in FinFET-based op-amps and OTAs
Microelectronics Journal
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This paper proposes a fast-transient over-sampled adaptive switching DC-DC converter. The converter employs a delta-sigma (ΔΣ) modulator to perform noise shaping at a variable and well regulated power output. As a result, the noise tones are much reduced compared to the conventional PWM converters. An observation-based line and load regulation circuit is proposed for fast response to variations at both power source and output load. A half-clock double-sampled technique is also presented to improve speed and resolution of the ΔΣ modulator. With TSMC 0.35 μm N-well CMOS process, the converter exhibits a ripple voltage of less than 8 mV with an on-chip filtering capacitor of 10 nF and a maximum load power of 450 mW. The regulated output voltage ranges from 0.35 V to 1.7 V. Compared with its PWM counterpart, the converter's noise peak is reduced by 35 dB at the nominal switching frequency of 9.2 MHz. The design provides an effective design solution to a large number of noise-sensitive applications.