Joint dynamic voltage scaling and adaptive body biasing for heterogeneous distributed real-time embedded systems

• Authors: L. Yan;Jiong Luo;N. K. Jha
• Venue: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
• Year: 2006

While dynamic power consumption has traditionally been the primary source of power consumption, leakage power is becoming an increasingly important concern as technology feature size continues to shrink. Previous system-level approaches focus on reducing power consumption without considering leakage power consumption. To overcome this limitation, we propose a two-phase approach to combine dynamic voltage scaling (DVS) and adaptive body biasing (ABB) for distributed real-time embedded systems. DVS is a powerful technique for reducing dynamic power consumption quadratically. However, DVS often requires a reduction in the threshold voltage that increases subthreshold leakage current exponentially and, hence, subthreshold leakage power consumption. ABB, which exploits the exponential dependence of subthreshold leakage power on the threshold voltage, is effective in managing leakage power consumption. We first derive an energy consumption model to determine the optimal supply voltage and body bias voltage under a given clock frequency. Then, we analyze the tradeoff between energy consumption and clock period to allocate slack to a set of tasks with precedence relationships and real-time constraints. Based on this two-phase approach, we propose a new system-level scheduling algorithm that can optimize both dynamic power and leakage power consumption by performing DVS and ABB simultaneously for distributed real-time embedded systems. Experimental results show that the average power reduction of our technique with respect to DVS alone is 37.4% for the 70-nm technology.