System-on-a-Chip: Design and Test
System-on-a-Chip: Design and Test
Getting High-Performance Silicon from System-Level Design
ISVLSI '03 Proceedings of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI'03)
UML for Embedded Systems Specification and Design: Motivation and Overview
Proceedings of the conference on Design, automation and test in Europe
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System-On-Chessboard is a novel System-On-Chip design technique targeted at Time-To-Market aspects of system level design. Various methodologies, tools and recommendations already exist but there is none which can claim to provide chip-in-a-day design productivity. This paper presents a brief overview of our strategy, devised to achieve chip-in-a-day and recommendations to handle various obstacles in achieving this target. This coarse-grained grid based technique involves efficient use of conventional tools, technologies and design methodologies and hence leverages existing development environments. The main emphasis in this paper is the physical design part of the system design flow.