Getting High-Performance Silicon from System-Level Design

Authors:
W. Rhett Davis
Affiliations:
-
Venue:
ISVLSI '03 Proceedings of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI'03)
Year:
2003

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Abstract

System-level design techniques promise a way to lessenthe productivity gap between fabrication and design.Unfortunately, these techniques have been slow to catchon, in part because they do little to help designersoptimize hardware. This paper presents a brief summaryof three system-level design techniques, Platform-baseddesign, SystemC, and Chip-in-a-day, in order to proposethat more system-level abstraction of physicalperformance is needed to make these techniques moreuseful. An analysis of design-productivity for three chipsdesigned with the Chip-in-a-Day flow is also presented.