Instruction level profiling and evaluation of the IBM/6000
ISCA '91 Proceedings of the 18th annual international symposium on Computer architecture
Dynamic dependency analysis of ordinary programs
ISCA '92 Proceedings of the 19th annual international symposium on Computer architecture
VCODE: a retargetable, extensible, very fast dynamic code generation system
PLDI '96 Proceedings of the ACM SIGPLAN 1996 conference on Programming language design and implementation
MediaBench: a tool for evaluating and synthesizing multimedia and communicatons systems
MICRO 30 Proceedings of the 30th annual ACM/IEEE international symposium on Microarchitecture
The SimpleScalar tool set, version 2.0
ACM SIGARCH Computer Architecture News
A flexible code generation framework for the design of application specific programmable processors
CODES '99 Proceedings of the seventh international workshop on Hardware/software codesign
Mapping reference code to irregular DSPs within the retargetable, optimizing compiler COGEN(T)
Proceedings of the 34th annual ACM/IEEE international symposium on Microarchitecture
Gprof: A call graph execution profiler
SIGPLAN '82 Proceedings of the 1982 SIGPLAN symposium on Compiler construction
Estimating Potential Parallelism for Platform Retargeting
WCRE '02 Proceedings of the Ninth Working Conference on Reverse Engineering (WCRE'02)
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Applications of different categories contain varying levels of data instruction, and thread-level parallelism inherently. New processing architectures are increasingly employing varying forms of these parallel execution mechanisms to boost performance. However, existing code assets are limited to sequential expressions of what should be highly parallel algorithms. These applications cannot take advantage of new parallel execution mechanisms unless their codes are retargeted to the new platforms. Automated retargeting compilers do exist, but are not efficient when the new architecture platforms are significantly different. On the other hand, rewriting applications manually is an expensive process, particularly for undocumented legacy applications.This paper presents a lightweight dynamic analysis technique for characterizing the types of parallelism inherent within the critical portions a given program to estimate the potential benefit of retargeting. Current parallelism extraction methods do not analyze the various forms of parallelism and treat the whole code homogenously. Since applications in general contain certain critical code regions which have high contribution towards the overall execution time, analyzing their parallelism gives a clearer insight on the potential of the whole application. The technique is validated on Spec95 and MediaBench benchmarks widely used to evaluate processor performance.