A completeness theorem for Kleene algebras and the algebra of regular events
Papers presented at the IEEE symposium on Logic in computer science
IEEE Transactions on Software Engineering - Special issue on formal methods in software practice
Model checking for programming languages using VeriSoft
Proceedings of the 24th ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Eraser: a dynamic data race detector for multithreaded programs
ACM Transactions on Computer Systems (TOCS)
Stubborn set methods for process algebras
POMIV '96 Proceedings of the DIMACS workshop on Partial order methods in verification
Compositional pointer and escape analysis for Java programs
Proceedings of the 14th ACM SIGPLAN conference on Object-oriented programming, systems, languages, and applications
Model checking
Reduction: a method of proving properties of parallel programs
Communications of the ACM
Detecting race conditions in large programs
PASTE '01 Proceedings of the 2001 ACM SIGPLAN-SIGSOFT workshop on Program analysis for software tools and engineering
OOPSLA '01 Proceedings of the 16th ACM SIGPLAN conference on Object-oriented programming, systems, languages, and applications
Partial-Order Methods for the Verification of Concurrent Systems: An Approach to the State-Explosion Problem
Thread-Modular Verification for Shared-Memory Programs
ESOP '02 Proceedings of the 11th European Symposium on Programming Languages and Systems
An improvement in formal verification
Proceedings of the 7th IFIP WG6.1 International Conference on Formal Description Techniques VII
CONCUR '98 Proceedings of the 9th International Conference on Concurrency Theory
A Modular Checker for Multithreaded Programs
CAV '02 Proceedings of the 14th International Conference on Computer Aided Verification
MPC '00 Proceedings of the 5th International Conference on Mathematics of Program Construction
ASE '00 Proceedings of the 15th IEEE international conference on Automated software engineering
Optimistic synchronization-based state-space reduction
TACAS'03 Proceedings of the 9th international conference on Tools and algorithms for the construction and analysis of systems
Formal Functional Verification of Device Drivers
VSTTE '08 Proceedings of the 2nd international conference on Verified Software: Theories, Tools, Experiments
Sequential verification of serializability
Proceedings of the 37th annual ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Verifying SystemC: a software model checking approach
Proceedings of the 2010 Conference on Formal Methods in Computer-Aided Design
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Reductions that aggregate fine-grained transitions into coarser transitions can significantly reduce the cost of automated verification, by reducing the size of the state space. We propose a reduction that can exploit common synchronization disciplines, such as the use of mutual exclusion for accesses to shared data structures. Exploiting them using traditional reduction theorems requires checking that the discipline is followed in the original (i.e., unreduced) system. That check can be prohibitively expensive. This paper presents a reduction that instead requires checking whether the discipline is followed in the reduced system. This check may be much cheaper, because the reachable state space is smaller.