The multiflow trace scheduling compiler
The Journal of Supercomputing - Special issue on instruction-level parallelism
The superblock: an effective technique for VLIW and superscalar compilation
The Journal of Supercomputing - Special issue on instruction-level parallelism
Dynamically scheduled VLIW processors
MICRO 26 Proceedings of the 26th annual international symposium on Microarchitecture
Optimization of VLIW compatibility systems employing dynamic rescheduling
International Journal of Parallel Programming - Special issue on instruction-level parallel processing—part I
DAISY: dynamic compilation for 100% architectural compatibility
Proceedings of the 24th annual international symposium on Computer architecture
Lx: a technology platform for customizable VLIW embedded processing
Proceedings of the 27th annual international symposium on Computer architecture
Stacking them up: a comparison of virtual machines
ACSAC '01 Proceedings of the 6th Australasian conference on Computer systems architecture
Java Virtual Machine Specification
Java Virtual Machine Specification
Targeting Dynamic Compilation for Embedded Environments
Proceedings of the 2nd Java Virtual Machine Research and Technology Symposium
LaTTe: A Java VM Just-in-Time Compiler with Fast and Efficient Register Allocation
PACT '99 Proceedings of the 1999 International Conference on Parallel Architectures and Compilation Techniques
A brief history of just-in-time
ACM Computing Surveys (CSUR)
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The application fields of bytecode virtual machines and Very Long Instruction Word (VLIW) processors overlap in the area of embedded and mobile systems, where the two technologies offer different benefits, namely high code portability, low power consumption and reduced hardware cost. Dynamic compilation makes it possible to bridge the gap between the two technologies, but special attention must be paid to instruction scheduling, which is required in VLIW architectures. While the rewards for dynamic optimization may be high, the trade-offs between optimization benefits and overheads must be fully understood.To this end, we have extended the work of the original JIST project [1], a Virtual Machine and JIT compiler for Java Bytecode targeted to a VLIW processor, to include a full implementation of a superblock scheduler. We show the impact of global scheduling on the performance of code compiled with JIST through the experimental study of a set of benchmark programs. We report significant speedups with respect to the local scheduling version of the JIST compiler.