A Design Methodology for Hardware Acceleration of Adaptive Filter Algorithms in Image Processing

  • Authors:
  • Hritam Dutta;Frank Hannig;Jurgen Teich;Benno Heigl;Heinz Hornegger

  • Affiliations:
  • University of Erlangen-Nuremberg, Germany;University of Erlangen-Nuremberg, Germany;University of Erlangen-Nuremberg, Germany;Siemens AG, Medical Solutions (AX), Forchheim, Germany.;Siemens AG, Medical Solutions (AX), Forchheim, Germany.

  • Venue:
  • ASAP '06 Proceedings of the IEEE 17th International Conference on Application-specific Systems, Architectures and Processors
  • Year:
  • 2006

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Abstract

Massively parallel processor array architectures can be used as hardware accelerators for a plenty of dataflow dominant applications. Bilateral filtering is an example of a state-of-the-art algorithm in medical imaging, which falls in the class of 2D adaptive filter algorithms. In this paper, we propose a semi-automatic mapping methodology for the generation of hardware accelerators for such a generic class of adaptive filtering applications in image processing. The final architecture deliver similar synthesis results as a hand-tuned design.