Design of a compact reversible binary coded decimal adder circuit
Journal of Systems Architecture: the EUROMICRO Journal
Note: Comparison between parallel and serial dynamics of Boolean networks
Theoretical Computer Science
A fractional bit encoding technique for the GMM-based block quantisation of images
Digital Signal Processing
Race condition free asynchronous micro-pipeline units
Proceedings of the 11th International Conference on Computer Systems and Technologies and Workshop for PhD Students in Computing on International Conference on Computer Systems and Technologies
Hi-index | 0.00 |