EPR-based bounded model checking at word level
IJCAR'12 Proceedings of the 6th international joint conference on Automated Reasoning
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We introduce a heuristic for automatically checking the validity of first-order formulas of the form \forall \alpha ^m \exists \beta ^n. \Psi \left( {\alpha ^m ,\beta ^n } \right) that are encountered in inductive proofs of hardware correctness. The heuristic introduced in this paper is used to automatically check the validity of k-step induction formulas needed to verify hardware designs. The heuristic works on word-level designs that can have data and address buses of arbitrary widths. Our refinement heuristic relies on the idea of predicate instantiation introduced in [2]. The heuristic proves quantified formulas by the use of a validity checker, CVC [21], and a first-order theorem prover, Otter [16]. Our heuristic can be used as a stand-alone technique to verify word-level designs or as a component in an interactive theorem prover. We show the effectiveness of this heuristic for hardware verification by verifying a number of hardware designs completely automatically. The large size of the quantified formulas encountered in these examples shows the effectiveness of our heuristic as a component of a theorem prover.